PCB Layout Engineer, Robotics

San Francisco

Hybridmid

Confirmed open35 days ago

First seenlast month

Remoet re-checks every listing roughly once a day.

Mid-level PCB Layout Engineer role in San Francisco using Cadence Allegro, hybrid policy, $318k-$485k annual salary.

Summary, tech stack, seniority and salary here are extracted or inferred by Remoet, not the employer's own words.

Salary

$318,000 - $485,000/year

Cadence Allegro PCB DesignerCadence Constraint ManagerCadence SigrityAnsys SIwaveCadence SKILL

Health insuranceRetirement plansPaid time offEqual opportunity employer

Confirmed open35 days ago

First seenlast month

Remoet re-checks every listing roughly once a day.