Design Verification Engineer

New York City

Hybridmid

Confirmed open106 days ago

First seen4 months ago

Remoet re-checks every listing roughly once a day.

Mid-level hardware verification role using SystemVerilog and UVM in a hybrid environment with $140k-$180k salary.

Summary, tech stack, seniority and salary here are extracted or inferred by Remoet, not the employer's own words.

Salary

$140,000 - $180,000/year

SystemVerilogUVMvManagerXceliumJasperPythonPerl

Equity

Confirmed open106 days ago

First seen4 months ago

Remoet re-checks every listing roughly once a day.