Senior FPGA Verification Engineer

Costa Mesa, California

On-sitesenior

Confirmed open8 days ago

First seen8 days ago

Remoet re-checks every listing roughly once a day.

Senior FPGA Verification Engineer role in Costa Mesa using UVM and SystemVerilog, paying $166k-$220k annually.

Summary, tech stack, seniority and salary here are extracted or inferred by Remoet, not the employer's own words.

Salary

$166,000 - $220,000/year

SystemVerilogUVMSVAAMDXilinxQuestaVCSXceliumVivadoGitLinuxPythonTclMakefileEthernetPCIeJESD204CMIL-STD-1553SPIARM

Comprehensive benefits packageEquity grants

Confirmed open8 days ago

First seen8 days ago

Remoet re-checks every listing roughly once a day.